1. Technical Field
The present invention belongs to the technical field of semiconductor devices, relates to a method for manufacturing a tunneling field effect transistor, and more especially, to a method for manufacturing a vertical-channel tunneling transistor using narrow band gap materials as the source.
2. Description of Related Art
In recent years, microelectronic technology with silicon integrated circuits as their core has developed rapidly, the and the development of the integrated circuit chip basically follows the Moore's law, namely the integration degree of semiconductor chips increases at a speed of doubling every 18 months. However, with the increase of the integration degree of semiconductor chips, the channel length of MOS transistor is also reducing continuously, and the semiconductor chip performances will decline, or even be unable to work due to the short channel effect when the channel length of the MOS transistor becomes extremely short.
The vertical-channel tunneling transistor is a kind of transistor with an extremely small leakage current, which can further minimize the circuit size and decrease voltage, thus reducing the chip power consumption significantly. The channel length of the vertical-channel tunneling transistor is usually determined by the process such as silicon mesa etching, ion implantation and extension, rather than be defined through photoetching as the traditional planar-channel MOS transistor, so the manufacturing of short-channel devices can be easily realized without the aid of complicate photoetching and the process is compatible with that of the planar-channel MOS transistor. In the common silicon mesa process, usually, a silicon mesa is firstly formed through etching and then a channel is formed by implantation. Since the depth of the junction implanted is difficult to control, the channel length is also difficult to control.